Architecture of Advanced Computers and Accelerators
| Title | Αρχιτεκτονική Προηγμένων Υπολογιστών και Επιταχυντών / Architecture of Advanced Computers and Accelerators |
| Code | 075 |
| Faculty | Engineering |
| School | Electrical and Computer Engineering |
| Cycle / Level | 1st / Undergraduate |
| Teaching Period | Winter |
| Coordinator | Ioannis Papaefstathiou |
| Common | No |
| Status | Active |
| Course ID | 600001028 |
Programme of Study: Electrical and Computer Engineering
Registered students: 37
| Orientation | Attendance Type | Semester | Year | ECTS |
|---|---|---|---|---|
| ELECTRICAL ENERGY | Elective Courses | 7 | 4 | 5 |
| ELECTRONICS AND COMPUTER ENGINEERING | Elective Courses | 7 | 4 | 5 |
| TELECOMMUNICATIONS | Elective Courses | 7 | 4 | 5 |
| Academic Year | 2019 – 2020 |
| Class Period | Winter |
| Faculty Instructors | |
| Class ID | 600144689
|
Class Schedule
| Building | Πολυτεχνείο - πτέρυγα Γ (ΤΗΜΜΥ & Τοπογράφων Μηχ.) |
| Floor | Όροφος 1 |
| Hall | Α5 (7) |
| Calendar | Τρίτη 18:00 έως 20:00 |
| Building | Πολυτεχνείο - κτίριο Γ (ΤΗΜΜΥ & Μηχανολόγων Μηχ.) |
| Floor | Όροφος 1 |
| Hall | Εργ. (434) |
| Calendar | Παρασκευή 17:00 έως 20:00 |
| Building | Πολυτεχνείο - πτέρυγα Γ (ΤΗΜΜΥ & Τοπογράφων Μηχ.) |
| Floor | Όροφος 1 |
| Hall | Α7 (4) |
| Calendar | Δευτέρα 16:00 έως 18:00 |
Course Type 2016-2020
- General Knowledge
- Scientific Area
Course Type 2011-2015
Specific Foundation / Core
Mode of Delivery
- Face to face
Digital Course Content
- e-Study Guide https://qa.auth.gr/en/class/1/600144689
- eLearning (Moodle): https://elearning.auth.gr/course/view.php?id=12158
Erasmus
The course is also offered to exchange programme students.
Language of Instruction
- Greek (Instruction, Examination)
- English (Examination)
Prerequisites
General Prerequisites
Computer Architecture
Learning Outcomes
Attending this course the student is expected:
• to familiarize himself / herself with the design choices (tradeoff between cost and performance) of computer architectures
• to learn the internal organization of a CPU and to design the basic modules of a specific CPU
• To fully understand the concepts and the structure of the Central Processing Unit (CPU) and the mechanisms to improve its performance as well as the the design and optimizations of an hierarchical memory system
General Competences
- Apply knowledge in practice
- Retrieve, analyse and synthesise data and information, with the use of necessary technologies
- Adapt to new situations
- Make decisions
- Advance free, creative and causative thinking
Course Content (Syllabus)
• Computer System performance. Metrics.
• Design principles of RISC and CISC CPUs
• Hardwired and Microprogrammed Control Units
• Pipelined processors. Structural, Data and Control Hazards
• Branch prediction techniques.
• ISA parallelism. VLIW and superscalar architectures. Dynamic instruction scheduling
• Associative and Cache Memory architecture
• Virtual memory architecture
• Simulation (or /and FPGA implementation) of the Control Unit, Register Set and Arithmetic and Logic Unit (ALU)
Educational Material Types
- Notes
- Slide presentations
- Book
Use of Information and Communication Technologies
Use of ICT
- Use of ICT in Communication with Students
- Use of ICT in Student Assessment
Course Organization
| Activities | Workload | ECTS | Individual | Teamwork | Erasmus |
|---|---|---|---|---|---|
| Lectures | 79 | 2.6 | ✓ | ||
| Laboratory Work | 21 | 0.7 | ✓ | ||
| Project | 20 | 0.7 | |||
| Exams | 30 | 1 | ✓ | ||
| Total | 150 | 5 |
Student Assessment
Description
Written Examination (180 min)
Assessment of optional project
Student Assessment methods
- Written Exam with Problem Solving (Formative)
- Labortatory Assignment (Formative)
Bibliography
Course Bibliography (Eudoxus)
Patterson D.A, και Hennessy J.L., "Οργανωση και Σχεδιαση Υπολογιστών: Η Διασυνδεση Υλικού και Λογισμικου", Τέταρτη Αμερικανική Έκδοση, Εκδόσεις Κλειδάριθμος, 2009
Last Update
03-12-2020
