Programmable FPGA-ASIC Devices
| Title | Προγραμματιζόμενα Κυκλώματα FPGA-ASIC / Programmable FPGA-ASIC Devices |
| Code | 083 |
| Faculty | Engineering |
| School | Electrical and Computer Engineering |
| Cycle / Level | 1st / Undergraduate |
| Teaching Period | Spring |
| Coordinator | Ágnōsto Ágnōsto |
| Common | No |
| Status | Active |
| Course ID | 600001036 |
Programme of Study: Electrical and Computer Engineering
Registered students: 6
| Orientation | Attendance Type | Semester | Year | ECTS |
|---|---|---|---|---|
| ELECTRICAL ENERGY | Elective Courses | 8 | 4 | 5 |
| ELECTRONICS AND COMPUTER ENGINEERING | Elective Courses | 8 | 4 | 5 |
| TELECOMMUNICATIONS | Elective Courses | 8 | 4 | 5 |
| Academic Year | 2021 – 2022 |
| Class Period | Spring |
| Faculty Instructors | |
| Class ID | 600205482
|
Course Type 2016-2020
- Scientific Area
Course Type 2011-2015
Specific Foundation / Core
Mode of Delivery
- Face to face
Digital Course Content
- e-Study Guide https://qa.auth.gr/en/class/1/600205482
- At the Website of the School: http://alexander.ee.auth.gr:8083/eTHMMY/
Language of Instruction
- Greek (Instruction, Examination)
Prerequisites
General Prerequisites
1. The lectures of "Electronics" and "Design of VLSI Systems".
2. The lecture "Low-level HW Digital Systems part I".
Learning Outcomes
1. The necessity of field programmable HW and HW/SW devices in industry and research. The understanding of their evolution, from 1981 up to now.
2. The understanding and fluent use of HDL languages (VHDL and Verilog).
3. Design of an ASIC device based upon FPGA device. The using of a HDL language and of the corresponding software tools. Practical observation (in real time) of the functioning of a designed unit.
General Competences
- Apply knowledge in practice
- Retrieve, analyse and synthesise data and information, with the use of necessary technologies
- Make decisions
- Work autonomously
- Work in teams
- Design and manage projects
- Appreciate diversity and multiculturality
- Respect natural environment
- Demonstrate social, professional and ethical commitment and sensitivity to gender issues
- Be critical and self-critical
- Advance free, creative and causative thinking
Course Content (Syllabus)
● Historical reference. The Generic ASIC integrated circuits. The PAL, GAL, PLA and their programming. Example, design of traffic signal controller in one PAL device. Multiple Array Matrix MAM. Intel EPLD architectures (covering 100 TTL circuits in one chip) and Altera APPEX, FLEX and MAX. The impossibility of further PAL and EPLD extension. ● CPLD devices. Altera and Xilinx software for their programming. ● FPGA devices. Basic categories and architectures, the ALTERA and XILINX families. The LUT and CLB structures, the levels of programmable interconnections. The IEEE JTAG 11.49.x. standard for programming. Multi-layer and 3-D FPGAs (today's sizes 4 billion MOSFET/ FINFET transistors in 24 nm). ● Regi-ster-Transfer Level (RTL) Design and Hardware Description Languages HDL. ● VHDL lan-guage. Theory, syntax and example, the vhdl code for MIPS processor. ● Verilog and System Verilog languages. Theory, syntax and the previous example with MIPS processor. ● XILINX-ISE and ALTERA-Quartus software for programming and simulation of FPGA devices. ● Soft-ware Processors of FPGAs. NIOS II, ARM CORTEX A-1 and Α-9, MP32 (MIPS). The architectu-res of Xilinx ZYNQ και Altera Aria families. ● Design from Higher Levels of Abstraction. Mo-del Based Design. Algorithms in C/C++. The Matlab - Simulink environment. Mixed analog / digital architectures, automatic transformation of C/C++ code onto vhdl and verilog. Coope-ration of Matlab with Xilinx and ALTERA software. ● HW/SW Co-design starting from high-level algorithms. ● Additional issues. Low-Power FPGA design, multiple clock models, Fault testing and Verification of FPGAs, regression tests, area/speed trade-off.
Laboratory works: 1. Design and programming a CPLD device. 2. Programming FPGA devi-ce by IEEE JTAG 11.49.x standard. 3,4. FPGA project design and programming by Xilinx-ISE and ALTERA Quartus software. 5. Embedding into an FPGA device, by using Matlab-Simu-link, of an adaptive VGA controller, installed into a car, and compensating vibrations descen-ding from the road irregularity. 6. Measurements and works with an educational bench mo-bile phone, through the development board ALTERA - Aria.
Educational Material Types
- Notes
- Slide presentations
- Video lectures
- Multimedia
- Book
Use of Information and Communication Technologies
Use of ICT
- Use of ICT in Communication with Students
Course Organization
| Activities | Workload | ECTS | Individual | Teamwork | Erasmus |
|---|---|---|---|---|---|
| Lectures | 33 | 1.1 | |||
| Laboratory Work | 30 | 1 | |||
| Tutorial | 31 | 1.0 | |||
| Exams | 56 | 1.9 | |||
| Total | 150 | 5 |
Student Assessment
Description
Written Examination (180 min)
Student Assessment methods
- Written Assignment (Summative)
- Performance / Staging (Summative)
- Written Exam with Problem Solving (Summative)
- Labortatory Assignment (Summative)
Bibliography
Course Bibliography (Eudoxus)
● Σ. Δοκουζγιάννη, "Προγραμματιζόμενα Κυκλώματα ASIC", πανεπιστημιακές σημειώσεις, Α.Π.Θ., 2010.
και τα βιβλία από τον Ευδοξο :
1. Σουράβλας, Ρουμελιώτης, "Ψηφιακά συστήματα Μοντελοποίηση & προσομοίωση με τη γλώσσα VHDL", Εκδόσεις ΤΖΙΟΛΑ & ΥΙΟΙ Α.Ε., 2008, ISBN: 978-960-418-155-1.
2. Pedroni , "Σχεδιασμός Κυκλωμάτων με τη VHDL", Εκδόσεις Κλειδάριθμος, 2008, ISBN: 978-960-461-118-8.
3. Ashenden "Ψηφιακή Σχεδίαση με VHDL – ενσωματωμένα συστήματα με VHDL", Εκδόσεις νέων τεχνολογιών, 2010, ISBN: 978-960-6759-505.
4. Ashenden, "Digital Design: An Embedded Systems Approach Using Verilog", Morgan Kauf-mann 2007, 584 pages, ISBN-10: 0123695279.
5. Vahid, "Digital Design with RTL Design, VHDL, and Verilog", Wiley, 2010, 592 pages, ISBN-10: 0470531088.
Last Update
23-12-2015
