Cognitive: Understanding of the fundamental issues in of power consumption in CMOS technology. Understanding of dynamic and speculative instruction execution. Instruction depedancies and processor performance. Understanding of memory hierarchy of modern prcessors. Memory and cache level optimization techniques. Principles of shared memory multicore archictures. Understanding of coherency and consistency problems.
Skills: Design of hardware level optimization techniques of modern processors for increasing the instructiuon parallelism (ILP). Cache optimizations at hardware, software and compiler levels. Design of shared memory multicore processors. Programming models and techniques for taking advantage other types of parallelism like helper threads, thread level speculation via speculative precomputation and/or run-ahead execution) and transactional memories.
Course Content (Syllabus)
Review of the infrastucture organization, functioning and performance of computers. Central Proccessing Unit. Modern proccessors, multicore processors. Software-Hardware co-design. Non-von Neumann architectures. Use of Hardware Description Languages (HDLs) in modern architecture studies.
Computer Architecture, Central Proccessing Unit, multicore processors, Software-Hardware co-design, non-von Neumann architecture