Computer Architecture
| Title | ΑΡΧΙΤΕΚΤΟΝΙΚΗ ΥΠΟΛΟΓΙΣΤΩΝ / Computer Architecture |
| Code | ΗΥ3502 |
| Faculty | Engineering |
| School | Electrical and Computer Engineering |
| Cycle / Level | 1st / Undergraduate |
| Teaching Period | Spring |
| Coordinator | Nikolaos Pitsianis |
| Common | No |
| Status | Active |
| Course ID | 20000610 |
| Academic Year | 2026 – 2027 |
| Class Period | Spring |
| Faculty Instructors | |
| Class ID | 600308201
|
Course Type 2016-2020
- Background
Course Type 2011-2015
General Foundation
Mode of Delivery
- Face to face
Digital Course Content
- e-Study Guide https://qa.auth.gr/en/class/1/600308201
- At the Website of the School: http://alexander.ee.auth.gr:8083/eTHMMY/cms.course.login.do? method=execute&PRMID=150
Erasmus
The course is also offered to exchange programme students.
Language of Instruction
- Greek (Instruction, Examination)
- English (Examination)
Learning Outcomes
This course is intended to provide
• An understanding of the underlining principles and the
organization of computer hardware
• A foundation for students to better understand how
software interacts with hardware
• Basic knowledge on how to design the control and data
path hardware for a MIPS‐like processor
• Basic knowledge on instruction pipelining
By the end of the course the student should be able
• To understand the internal organization of the processor
hardware, memory and their interconnecting bus as seen
from the machine language programmer
• to translate simple high level language programs to
machine level programs
• to make or change functions of machine instructions by
modifying the control and data path hardware
General Competences
- Apply knowledge in practice
- Retrieve, analyse and synthesise data and information, with the use of necessary technologies
Course Content (Syllabus)
Computer Abstractions, Operations of Computer Hardware,
Instruction Set, Representing Instructions in Assembly Language,
Addressing, Arithmetic for Computers, Processor, Datapath,
Control Unit, Microprogramming, Pipelined datapath, pipelined
control, Exceptions, Memory Hierarchy, Basics of Cashes, Busses
and Connections between Processor, Memory and I/O, Interfacing
I/O devices to Processor and Memory.
Keywords
omputer Architecture, Computer Organiazation, Computer Hardware, Assembly language
Educational Material Types
- Notes
- Slide presentations
- Book
Use of Information and Communication Technologies
Use of ICT
- Use of ICT in Course Teaching
- Use of ICT in Laboratory Teaching
- Use of ICT in Communication with Students
Course Organization
| Activities | Workload | ECTS | Individual | Teamwork | Erasmus |
|---|---|---|---|---|---|
| Lectures | 26 | ✓ | ✓ | ||
| Tutorial | 13 | ✓ | |||
| Interactive Teaching in Information Center | 13 | ✓ | ✓ | ||
| Written assigments | 40 | ✓ | ✓ | ||
| Total | 92 |
Student Assessment
Description
25% assignment assessment, 25% lab exams, 50% final written exams in class
Student Assessment methods
- Written Exam with Short Answer Questions (Summative)
- Written Exam with Problem Solving (Summative)
- Labortatory Assignment (Summative)
Bibliography
Course Bibliography (Eudoxus)
David A. Patterson, John L. Hennessy, "Οργάνωση και Σχεδίαση Υπολογιστών-Η Διασύνδεση Υλικού και Λογισμικού", Τέταρτη Αμερικανική Έκδοση, Εκδόσεις Κλειδάριθμος, Αθήνα, 2006
Additional bibliography for study
Τίτλος Συγγράμματος: Η Αρχιτεκτονική των Υπολογιστών
Συγγραφέας: Andrew S. Tanenbaum
Εκδόσεις ΚΛΕΙΔΑΡΙΘΜΟΣ
Last Update
19-08-2013
